Job Description

Job Type : Contract 12 months +

Location/City : CA - Santa Clara

Category : Electrical

Region : Pacific

Id : 25679

ASIC DFT Verification Engineer

Hours/Week: 40 hours/week, M-F
Start Date: ASAP
Assignment Length: 12 months
Location: Santa Clara, CA


Job Description:
* Debug and cleanup for CDC and lint of design
* Design verification of DFT related logic
* Integrate and adopt DFT tests from external DFT IP team
* Modify and update existing MBIST verification tests to fit design changes
* Perform first line curation debug on DFT related tests

Education Requirements:
- Bachelor or Master of Science Degree in Electrical or Computer Engineering

How to Apply:
Please send your resume in Word or PDF format to:
Copy and Paste the following job title and code and place it in the subject line of your email so we can identify the job: ASIC DFT Verification Engineer (#25679-MH1639)

Application Instructions

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