Digital ASIC Design Engineer
Digital ASIC Design Engineer, Mulitple openings
Contract 6-12+ months, M-F 40 hours weekly
Must US Citizen, Active Clearance is preferred
Client is seeking talented and motivated individuals to tackle challenging engineering problems. As a Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies
14nm FinFET, 22FDX, etc. You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in this area. Applicants should possess solid skills in front and back-end digital systems design with experience in design flows from Cadence or Synopsys, and a working knowledge of analog design principles and signal / power integrity. Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus.
Specific Responsibilities: System architecture design, Detailed analysis design and capture, Manage PCB layout design resources, Prototype bring up and debugging ,Functional verification, Signal characterization
Testing Qualifications: Required Qualifications: PhD or MSEE+6 preferred, Strong analysis and problem solving skills, Fluent in Verilog/VHDL,
Fluent in Cadence or equivalent Digital ASIC Tool Suite, e.g., Genus, Innovus, Tempus, Voltus, etc.
Experience with high-level design, simulation, and verification tools ¿ Experience with scripting languages Python/PERL and regular expressions Experience with MATLAB, Simulink, and HDL Coder ¿ Experience with C, C++, or Java
Ability to acquire a security clearance if needed Desired Qualifications: ¿ Experience with Linux/UNIX OS, piping, batching, etc. Experience with SRAM compilers and architecture tradespace
Familiarity with memory design for SRAM, DRAM, and NVRAM ¿ Familiarity with SOC tradespace including processor selection, memory and bus implementation and architecture
Familiarity with interface specifications: SPI, I2C, MIL-STD-1553, RS-232, RS-422, PCIE, AXI, and Ethernet Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc.
Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers Applicants selected for this position will be required to obtain and maintain a U.S. Security Clearance.