Job Description

Digital Systems-on-Chip Architect, DMTS

Direct Hire FTE, Full Benefits, US Citizen

This position is remote work eligible.

Applicants should have experience with design flows from Cadence or Synopsys, and have a working knowledge of physical, as well as logical, design.

Specific Responsibilities:

  • Requirements capture
  • System architecture development
  • IP block configuration
  • RTL design in SystemVerilog, Verilog or VHDL
  • Functional verification
  • Handoff to physical design
  • Experience in multi-core processor systems
  • Fluent in Verilog/VHDL/System C
  • Fluent in Cadence or Synopsys Digital ASIC Tool Suite
  • Ability to acquire a security clearance if needed

Desired Qualifications:

  • PhD or MSEE with 25+ years of experience
  • Experience working with firmware developers.
  • Experience with GPU & neural network inferencing subsystems
  • Familiarity with sensor & multi-media subsystems
  • Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc.
  • Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers

Security Requirement:

  • Applicants selected for this position will be required to obtain and maintain a government security Government security clearance requires proof of US citizenship

Application Instructions

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