VHDL Design Engineer
VHDL Design Engineer- (2) Positions open
Contract 3 years, M-F 40 hours weekly
Active Secret Clearance is Required
Client specializes in advanced network and communications systems development, with a focus on rapid prototyping of waveforms and algorithms to support radical next generation tactical mobile, military airborne communications systems. Client is seeking an experienced VHDL Design Engineer to implement cutting edge algorithms.
Position Scope/Job Functions Client is seeking to hire two (2) VHDL Design Engineers with experience working on different aspects of FPGA design and implementation for a high-throughput signal processing system for communications applications. The candidate for this position must have experience working independently and part of a team on complex VHDL designs and multi-FPGA implementations. The candidate must be able to develop new RTL modules with minimal supervision
Skills: Preferred • Experience with integrating and deploying multiple FPGAs using high speed interfaces such as Aurora, Serial RapidIO, PCIe and/or 10G/1G Ethernet • Experience with script development and task automation in an interpreted scripting language such as Python, TCL, Perl, BASH or TCSH • Hands-on experience with HW test equipment such as Oscilloscopes and Spectrum Analyzers • Experience with Xilinx Zinq, MPSOC, or RFSOC devices • Familiarity with software development in C/C++ • Familiarity with UVM and SystemVerilog
Education/Professional Certifications PhD plus 5 years minimum relevant experience or MS plus 8 years minimum relevant experience.