Job Description

Schedule - M-F 40hrs
3 year assignment

Generates, revises, updates, compiles, debugs and writes business, scientific, or software computer programs. Develops flow charts and diagrams outlining process steps in operation; develops and revises program code. Prepares documentation of program development, modifications to code and operating instructions. Conducts program tests and may be required to analyze system capabilities to resolve input/output problems.
Must Have
Degree Level
Bachelor's DegreeNo
Simulation Tools such as HFSS, CST, GRASP, etc.10 years
Xilinx FPGA5 years
FPGA Programming10 years
Real-Time Hardware/ Software Development and Implementation10 years
VHDL / Verilog10 years
Nice to Have
Degree Level
Masters DegreeNo
Signal Processing
MATLAB Signal Processing Techniques (Fourier Transformations, filters, etc.)0 years
Signal Processing Algorithms and Techniques0 years
The Advanced Lasercom Systems and Operations Group develops, builds, tests, and operates laser communications systems for a variety of applications and environments. Lasercom offers dramatically increased data rates and enhanced physical security relative to standard radio frequency-based communications systems. The Group has expertise in communications; optics; electro-optics; optical turbulence mitigation; precise pointing control systems; embedded systems; command, control, and telemetry; high-speed digital design, test set design and fabrication; data analysis; modeling; and simulation. Group 66 is in need of an Engineer II for development of VHDL to be used in Xilinx FPGAs that implement the algorithms necessary to support a lasercom system.
Virtual/Work from Home 
Other information relevant to the job requirement? 
• Experience with VHDL development
- high-speed designs (? 250 MHz clocking)
- complex algorithm development
• Using simulation tools (ModelSim preferred)
• Proficiency with Xilinx FPGAs and the Vivado tool suite
• Experience testing their designs in HW in a laboratory environment

• Experience with Xilinx Ultrascale FPGAs
• Experience in high-rel space based design
• Able to understand MATLAB simulations of an algorithm and convert to HDL
• Proficiency with implementation of signal processing algorithms in hardware

Interviews will likely be phone screen followed by Zoom interviews.

Candidates will need to be local to work partially onsite in the short and long term.

A candidate already possessing a clearance would be preferred, but they will look at candidates that can obtain the clearance upon hire.
Level of Effort 
Full-Time Basis
Position Type 
Research (STE Eligible)
Will this position materially impact the conduct or direction of a research program(s)? 
What level of clearance is required? 

Application Instructions

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